Rsa Implementation on Reconfigurable Hardware
نویسنده
چکیده
This paper presents an example of using a hardwaresoftware codesign by implementation of the RSA cipher embedded in Field Programmable Logic Devices (FPLDs). The effect of moving the computationally most expensive parts of RSA into an optimized scalable Montgomery Multiplication (MM) coprocessor is analyzed and compared with a pure software solution.
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